This PDF file contains the front matter associated with SPIE Proceedings Volume 12812, including the Title Page and Table of Contents.

The PTB has initiated a project to establish a length comparator for two-dimensional long-distance calibration of photomask standards. The new LMS 2000 mask measuring machine of the Ernst Leitz Wetzlar GmbH has been installed for this purpose. The aim is to calibrate mask standards absolutely, i.e. in terms of meter units, in a range of 200 mm x 200 mm with an uncertainty of about 20 nm x 20 nm. It is intended to develop methods for the on-line correction of errors which are due to machine characteristics, laser interferometer parameters, temperature variations and dimensioned properties of the mask. The fundamental metrological problems encountered in high-precision length calibration in one and two dimensions are presented. A short report on the state of our work and an outlook on future steps will be given.

To determine the effect of 5x reticle defects on wafer photoresist images, a 5x test reticle containing submicron programmed defects was created. Silicon wafers were printed using a state-of-the-art 0.35 and 0.43 NA g-line 5x stepper. The size of the minimum resolvable reticle defect was determined by examining the wafer photoresist images using both optical and scanning electron microscopes. The photographs show the effect of submicron defects located on or near geometry edges. Submicron reticle defects affected resist thickness, image profiles and critical dimensions in a 2.0 μm diameter "sphere of influence" on the wafer. The results of this study indicate that a 0.5 μm defect specification is required for today's advanced 5x reticles, and that a 0.25 μm specification must be implemented when pushing 5x wafer steppers to the edge of their performance capabilities.

Application Specific Integrated Circuit (ASIC) wafer fabrication requires short cycle times and manufacturing flexibility; key elements for success in the ASIC market. The speed with which a new design is translated into working devices depends on many factors. One critical factor is mask and reticle inspection and acceptance. An ASIC environment has numerous processes and a constant stream of new devices creating problems in: inspection, pelliclization, storage and tracking. At VLSI Technology, over 100 plates are received each week from several mask suppliers. Our Incoming Photomask QC group is responsible for the inspection, pelliclization, storage and tracking of these plates. It is very easy for defective plates to be shipped, inspections to be missed or for plates to be incorrectly logged and misfiled. Organization, well-defined procedures, proper training and good working relationships with mask suppliers are imperative to insure all plates meet specifications and are released on time. Procedures and techniques used to accomplish this are presented.

A unique system has been developed to automatically generate scribelines and place scribeline artifacts. This system integrates concise placement instructions, automatic artifact creation, a graphics editing tool, and automatic reticle field layout. The mask engineer may choose a standardized set of artifacts and artifact placements, or may create a specialized scribeline without ever utilizing graphics tools. However, a link to graphics tools is provided for versatility. Primary die arrays and pattern file offsets are automatically generated based on an allowed field size defined for reticle applications. The result is a unique, integrated solution which combines low’ database preparation costs and fast cycle times with error-free scribeline creation and the capability of specialized scribeline layout for any processing technology, mask layers, alignment sequence, or placement rules. Additional unique features of the Scribe Maker System include the ability to automatically compensate for pattern file shrinks performed on the E-Beam, and a utility which allows for immediate retrofitting of any previously generated scribeline. These features are especially useful in reducing error and scribeline generation time. This powerful tool is also system independent, and it requires little disk space and computer time.

AB Networks, Inc. is automating the photomask industry by introducing CIM (Computer Integrated Manufacturing) technology in the areas of network communication, production control, process and inspection data collection and sales order entry systems.

This paper discusses the advantages of merging E-beam fracture, KLARIS fracture and graphics into one software package. Transcription produces CATS, a high-speed, graphical data fracturing package producing MEBES, ALF, KLARIS, Philips EBPG and Mann and Electromask PG data.

Recent progress of the microfabrication technologies makes it possible to develop 16M DRAM, the most advanced VLSI devices, by the optical lithography with the high-performance 5:1 wafer steppers. Therefore, it is very important to fabricate defectless reticles with high accuracy for the wafer steppers. Increasing of the device integration causes the expansion of the chip size and the reduction of the pattern dimension. This makes the writing time much longer using the conventional raster-scan EB system. Moreover, the reticles, which cannot comprise two same dies under the limitation of the image field of the stepper, must be inspected by the data-comparison method. We have developed the software system which can prepare the data for the variable-shaped EB system (JBX-6AIII) efficiently and produce the compacted data for the inspection system (KLA-228). The variable-shaped EB system has the advantages of a high writing speed and a small address size. However, a performance of the data preparation is much lower than the raster-scan EB system, because complicated processes as an overlap removal or a tone reversal are required. In order to solve this problem, the hierarchical data format has been introduced into the data-preparation software. The data of 16M DRAM for the variable-shaped EB system was prepared in 1 hour/layer. To inspect the 1-die reticles of 16M DRAM, the inspection system and the data conversion softwares (DBCS V2.0) with the capability of compacting data volume was applied, and the interface program between our data-preparation system and DBCS has been developed. The defectless 16M DRAM reticles can be fabricated within a reasonable throughput by using these systems. LSI technology is now in an extremely rapid phase of development. The mass production of 4M DRAM will begin soon and the development of the next-generation 16M DRAM has become active rapidly. Several kind of lithography techniques such as G-line, I-line, Excimer laser, X ray and electron-beam direct writing have been investigated to fabricate half micron patterns which are the design rule of 16M DRAM. We suppose that a G-line 5:1 wafer stepper is the most promising lithographic tool for the fabrication of 16M DRAM, considering its technical possibility, maturity and productivity. The subject of this paper is the fabrication technology of 16M DRAM reticles using the variable-shaped EB system and the data-comparison inspection system.

Mask cleaning can be one of the most troublesome steps in the mask making process. Automatic defect inspection and post pellicle inspection have established the requirement that a mask must emerge from a cleaning process virtually free of any films and particulate materials. A spin/spray cleaning system has been developed using conventional H₂SO₄ + H₂O₂ chemistry and hot water to clean and strip masks. The system was beta site tested at Micro Mask. The machine is described and preliminary test results are presented establishing the suitability of the spin/spray processor for most mask cleaning and stripping applications.

Electrical metrology is broadly utilized in semiconductor manufacturing to diagnose, characterize, optimize and control semiconductor equipment and processes. This simple, “tried and true” technology does not suffer the limitations encountered with trusted optical methods of measuring today’s small geometries. The concepts used are as fundamental as Ohm’s Law; the test equipment is as basic as the trusty voltmeter. The standard electrical test structures and measurement techniques discussed here include those used to measure sheet resistivity, linewidth and registration on masks. In addition, some initial data is presented on electron beam pattern generation system (e-beam) characterization, including butting error and stripe linearity. Direct testing is limited to conductive materials. The antireflective chrome layer has been removed from photomasks prior to probing. This work is being done in conjunction with the Reticle Services Group at Ultratech Stepper and the Product Engineering Department at Prometrix.

There are many problems that are thought to be caused by electrostatic charge in the process of manufacturing high quality reticles to make such high-density ICs as 4M and 16M. We studied the causes of the pattern damage during the washing and chemical washing process in the reticle manufacturing. The following facts have been clarified. Cr pattern in the reticle is destroyed by the electrostatic discharge in the resist generated by the friction between the plate and the pure water. The possibility of the pattern damage by the electrostatic charge is greatly reduced by lowering the water resistivity by adding municipal water or CO₂ gas to pure water. In the chemical washing process, electrochemical reactions caused by the electrostatic charge etch the Cr pattern.

A plasma etcher has been developed for the mask industry to achieve uniform and tight dimension linewidth control. It also achieves a very low material loss of PBS in the descum process. This paper describes the problems encountered in designing such a system and the methods used to overcome the difficulties. The BMP reactive ion etcher has especially been developed for mask making and is used in two fields: the dry etching of masks with rather vertical resist structures (novalak, PM, PMMA). the linewidth adjustment of bevelled PBS structures by a sophisticated descum process prior to wet etching. The etch chemistry is comparable to the silicide etching in the silicon wafer technology, the difference in the mask processing is caused by the frequent changing substrate sizes and mainly by the different thicknesses of the isolating masks. In addition, the PBS descum process requires extreme low power densities, whereas the plasma etch process of the chrome requires high power densities to enable the single substrate etching within reasonable times (1-2 minutes). Instead of the usual II-filter coupling, direct coupling of the generator is used to enable these requirements. The power is controlled via several fixed amplitudes (constant self bias voltage within each amplitude level) and fine regulation via duty cycle, thus ensuring the ignition voltage for the low power process as well. The endpoint recognition uses direct metering of the transmission of the plasma radiation through the mask. The transmission curve indicates different compositions of the antireflection layer and the chromium layer as well as inhibition effects on the top and on the interfaces, thus additionally serving as a tool to characterize the material. The chrome oxide of transparent masks and molybdenum silicide layers etch faster than chrome, without inhibition at the beginning and they exhibit a linear etch behavior. The linewidth uniformity of the dry etch process is within 500 A (3 sigma). The material loss of the PBS descum process is +/- 1 nm (using an F.T.M. across 7" square resist blanks). System and process data are developed according to semi control standards (SECS) and enable full system control, the remote data storage and the integration of the system into fully automated mask fabrication.

Different requirements of mask cleaning and the various approaches to achieve a "higher level" of cleanliness based on in-depth experience in chrome blank manufacturing are presented. An asynchronous robotic cleaning technique was developed to avoid any mechanical stress, such as brush scrubbing, as well as minimize any thermal shock to the substrates in the process, detailed chemical analysis was conducted to study an alternative method. Process steps will be discussed in comparison to existing alternative technologies The significance of each step will be addressed, because when used subsequently an improvement is evident. Various users' data illustrates the results of achieving ultimate particle size below 0.5/0.7 microns, total absence of organic contaminants, possibility to re-clean masks many times without damage to the chrome layer and a highly favorable cost/performance ratio using this novel approach as the first step in automating the mask making environment.

Conventional electron-beam exposure systems developed for photomask making operate at 10 kV for ease of deflection system design and cost-effectiveness. However, as the critical dimensions scale into the submicron range, the fabrication technology of IX and 5X photomasks needs to be re-evaluated. This paper compares the capabilities and limitations of 10, 20, and 50 kV e-beam lithography for submicron mask-making. Parameters considered are the Iinewidth control as affected by proximity exposure, resist wall profiles, pattern resolution and line edge quality, and exposure dose and resist development latitudes. Both positive (PBS) and negative (GMC) resists on photomask substrates were exposed on the MEBES III and EBES II systems at AT&T Bell Laboratories. Results show that for isolated features and sparse layouts, 50 kV is superior to 10 and 20 kV for submicron photomask fabrication, and provides sharper resist wall profiles, superior resolution and greater process latitudes resulting from the improved beam edge slope and higher contrast exposure profile. However, in order to meet the 10% Iinewidth control budget, proximity correction is required at all three operating voltages for both IX and 5X reticles. The offsetting factor at 50 kV is the additional cost for a more complicated e-beam column design and higher speed deflection electronics. Nevertheless, there is no penalty in throughput since the increase in usable current outweighs the loss in resist sensitivity

Masks should have and reticles for wafer steppers have to have zero defects. Despite of all repair possibilities the defect generation during the fabrication process has to be minimized to reach short turn around times and economical feasable mask prices. As most of the defects are generated by particles and a large share of the particles is generated by humans it is possible to reduce defects by special clean room adapted automation. A detailed evaluation of the mask fabrication process shows that it is most important to avoid particles until the chrome is etched because from then on cleaning of the mask is possible. Therefore the e-beam mask facility at Siemens in Munich has been fully automated from blank loading into the e-beam system until chrome etching including all handling- and transport- steps and cd-measurements: - For loading and unloading of mask-blanks into holders and magazines of the e-beam system a precision clean room robot with 6 axes is used. This "preparation cell" includes automatic defect inspection of the resist surface. - The "e-beam writing cell" is equipped with an identical robot as before for loading and unloading the e-beam system with magazines. The processing line for resist development, baking, plasma descumming and chrome etching is directly accessed by the robot of the "preparation cell". Mask handling and transport in this line is performed by four handling systems each serving one process system and one automatic microscope for cd-measurement. The process line is an expert system: According to the result of the cd-measurement a rework or variation of the following process parameters is initiated if necessary. The whole system is connected to a CAM-system by SECS interfaces.

Since the replication of pattern using a stepper continues to occupy the primary position in the submicron lithographic process, the quality of the reticle is of great importance. This report describes the fabrication technique of high precision e-beam reticles using a variable shaped, step and repeat e-beam system. To improve pattern accuracy, the optimum field size was selected. With the narrowing of the field size, lens aberration and distortion decrease, resulting in improved CD and position accuracy. CD accuracy was less than 0.1pm and the distortion error was less than 0.05pm for a field of less than 0.6mm. To obtain high precision e-beam reticles, a field size of 0.6mm was selected. In order to avoid the degradation of the device characteristics, the field size was also changed in accordance with the specific pattern period of the devices. For example, the field size was selected to match the periods of the memory cell for the memory device. To improve the overall CD accuracy a high resolution negative e-beam resist without post polymerization effects was used) . These techniques lead to reticles of the memory device and CCD(Charge Coupled Device) with CD accuracy and position accuracy of 0.1pm peak to peak.

This paper reports on the development of a laserbased raster scan pattern generator for the production of reticles and micromasks. The system exposes the standard optical resist coated maskblanks by utilizing a single HeCd laser beam. High throughput is achieved by using a microsweep that is generated by an acousto optical deflector. The basic design of a very compact and simple pattern generation system with state of the art speed and performance will be discussed.