Photonic integrated circuits: new challenges for lithography

Jens Bolten; Thorsten Wahlbrink; Andreas Prinzen; Caroline Porschatis; Holger Lerch; Anna Lena Giesecke

doi:10.1117/12.2248325

20 October 2016 Photonic integrated circuits: new challenges for lithography

Jens Bolten, Thorsten Wahlbrink, Andreas Prinzen, Caroline Porschatis, Holger Lerch, Anna Lena Giesecke

Proceedings Volume 10032, 32nd European Mask and Lithography Conference; 100320D (2016) https://doi.org/10.1117/12.2248325
Event: 32nd European Mask and Lithography Conference, 2016, Dresden, Germany

Abstract

In this work routes towards the fabrication of photonic integrated circuits (PICs) and the challenges their fabrication poses on lithography, such as large differences in feature dimension of adjacent device features, non-Manhattan-type features, high aspect ratios and significant topographic steps as well as tight lithographic requirements with respect to critical dimension control, line edge roughness and other key figures of merit not only for very small but also for relatively large features, are highlighted. Several ways those challenges are faced in today’s low-volume fabrication of PICs, including the concept multi project wafer runs and mix and match approaches, are presented and possible paths towards a real market uptake of PICs are discussed.

Citation Download Citation

Jens Bolten, Thorsten Wahlbrink, Andreas Prinzen, Caroline Porschatis, Holger Lerch, and Anna Lena Giesecke "Photonic integrated circuits: new challenges for lithography", Proc. SPIE 10032, 32nd European Mask and Lithography Conference, 100320D (20 October 2016); https://doi.org/10.1117/12.2248325

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