Fabrication tolerant flat-top interleavers

Matteo Cherchi; Fei Sun; Markku Kapulainen; Tapani Vehmas; Mikko Harjanne; Timo Aalto

doi:10.1117/12.2252110

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20 February 2017 Fabrication tolerant flat-top interleavers

Matteo Cherchi, Fei Sun, Markku Kapulainen, Tapani Vehmas, Mikko Harjanne, Timo Aalto

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Proceedings Volume 10108, Silicon Photonics XII; 101080V (2017) https://doi.org/10.1117/12.2252110
Event: SPIE OPTO, 2017, San Francisco, California, United States

Abstract

Integrated circuits based on micron-scale silicon waveguides have the clear advantage of being tolerant to fabrication errors, thanks to the high mode confinement within the guiding core. Here we show how flat-top interleavers can be achieved on a micron-scale silicon photonics platform based on ring-loaded Mach-Zehnder Interferometers (MZIs), without the need for any thermal tuning. Robust designs are also guaranteed by resorting to Multi-Mode Interferometers (MMIs) as power splitters in both the MZIs and the ring resonators. A trade-off between in-band ripple and roll-off can be achieved by changing the ring splitting ratios. In particular rings with different finesse based on MMIs with 50:50, 72:28, and 85:15 splitting ratios have been designed, fabricated and successfully tested. In-band ripples as low as 0.2 dB and extinction ratios exceeding 15 dB have been measured from the fabricated samples. Repeatability of the performances from chip to chip and wafer to wafer is presented to show the tolerance of the devices to fabrication errors. Even though these particular devices have been designed for TE polarization only, polarization insensitive designs can be also achieved. All designs are based on strip waveguides and compact Euler-bends, leading to footprints in the order of 700x300 μm², also thanks to an optimized configuration. They can find applications as interleavers as such or as stages in cascades of N interleavers to achieve flat-top 1x2^N (de)multiplexers.

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Matteo Cherchi, Fei Sun, Markku Kapulainen, Tapani Vehmas, Mikko Harjanne, and Timo Aalto "Fabrication tolerant flat-top interleavers", Proc. SPIE 10108, Silicon Photonics XII, 101080V (20 February 2017); https://doi.org/10.1117/12.2252110

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