Translator Disclaimer
20 February 2017 Optimization of linear-logarithmic CMOS image sensor using a photogate and a cascode MOSFET for reducing pixel response variation
Author Affiliations +
Proceedings Volume 10110, Photonic Instrumentation Engineering IV; 101101R (2017)
Event: SPIE OPTO, 2017, San Francisco, California, United States
Recently, CMOS image sensors (CISs) have become more and more complex because they require high-performances such as wide dynamic range, low-noise, high-speed operation, high-resolution and so on. First of all, wide dynamic range (WDR) is the first requirement for high-performance CIS. Several techniques have been proposed to improve the dynamic range. Although logarithmic pixel can achieve wide dynamic range, it leads to a poor signal-to-noise ratio due to small output swings. Furthermore, the fixed pattern noise of logarithmic pixel is significantly greater compared with other CISs. In this paper, we propose an optimized linear-logarithmic pixel. Compared to a conventional 3-transistor active pixel sensor structure, the proposed linear-logarithmic pixel is using a photogate and a cascode MOSFET in addition. The photogate which is surrounding a photodiode carries out change of sensitivity in the linear response and thus increases the dynamic range. The logarithmic response is caused by a cascode MOSFET. Although the dynamic range of the pixel has been improved, output curves of each pixel were not uniform. In general, as the number of devices increases in the pixel, pixel response variation is more pronounced. Hence, we optimized the linear-logarithmic pixel structure to minimize the pixel response variation. We applied a hard reset method and an optimized cascode MOSFET to the proposed pixel for reducing pixel response variation. Unlike the conventional reset operation, a hard reset using a p-type MOSFET fixes the voltage of each pixel to the same voltage. This reduces non-uniformity of the response in the linear response. The optimized cascode MOSFET achieves less variation in the logarithmic response. We have verified that the optimized pixel shows more uniform response than the conventional pixel, by both simulation and experiment.
© (2017) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Myunghan Bae, Byoung-Soo Choi, Sang-Hwan Kim, Jimin Lee, Chang-Woo Oh, and Jang-Kyoo Shin "Optimization of linear-logarithmic CMOS image sensor using a photogate and a cascode MOSFET for reducing pixel response variation", Proc. SPIE 10110, Photonic Instrumentation Engineering IV, 101101R (20 February 2017);


Analysis of self-correcting active pixel sensors
Proceedings of SPIE (January 17 2005)
A differential active pixel sensor
Proceedings of SPIE (December 09 2004)
High-speed camera based on a CMOS active pixel sensor
Proceedings of SPIE (February 29 2000)
Improved night vision demonstrator program status
Proceedings of SPIE (May 04 2007)

Back to Top