Presentation + Paper
28 January 2017 Chip-scale Si-photonics optical transceiver for a photonics-electronics convergence system
K. Kurata, K. Yashiki, Y. Ibusuki, J. Fujikata, M. Kurihara, Y. Hagihara, I. Ogura, T. Nakamura
Author Affiliations +
Abstract
We propose a chip-scale silicon photonics transceiver using multimode optical wiring to realize low-cost and high-productivity optical interconnection usable for several short-reach applications. We also present hybrid-integrated low-power- consumption chip-scale optical transmitters/receivers called “optical I/O cores.” The optical I/O cores provide clear eye opening in a wide range of temperature operation without clock data recovery. We show the design of one such optical I/O core and evaluate its performance for a wide range of temperatures. Finally, we introduce an example of LSI system based on the optical I/O approach.
Conference Presentation
© (2017) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
K. Kurata, K. Yashiki, Y. Ibusuki, J. Fujikata, M. Kurihara, Y. Hagihara, I. Ogura, and T. Nakamura "Chip-scale Si-photonics optical transceiver for a photonics-electronics convergence system", Proc. SPIE 10131, Next-Generation Optical Networks for Data Centers and Short-Reach Links IV, 1013107 (28 January 2017); https://doi.org/10.1117/12.2254017
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CITATIONS
Cited by 2 scholarly publications.
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KEYWORDS
Silicon photonics

Transceivers

Temperature metrology

Optical interconnects

Eye

Integrated optics

Tolerancing

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