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12 January 2018 A third-order silicon racetrack add-drop filter with a moderate feature size
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In this work, we design and fabricate a highly compact third-order racetrack add-drop filter consisting of silicon waveguides with modified widths on a silicon-on-insulator (SOI) wafer. Compared to the previous approach that requires an exceedingly narrow coupling gap less than 100nm, we propose a new approach that enlarges the minimum feature size of the whole device to be 300 nm to reduce the process requirement. The three-dimensional finite-difference time-domain (3D-FDTD) method is used for simulation. Experiment results show good agreement with simulation results in property. In the experiment, the filter shows a nearly box-like channel dropping response, which has a large flat 3-dB bandwidth (~3 nm), relatively large FSR (~13.3 nm) and out-of-band rejection larger than 14 dB at the drop port with a footprint of 0.0006 mm2 . The device is small and simple enough to have a wide range of applications in large scale on-chip photonic integration circuits.
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Ying Wang, Xin Zhou , Qian Chen, Yue Shao, Xiangning Chen, Qingzhong Huang, and Wei Jiang "A third-order silicon racetrack add-drop filter with a moderate feature size", Proc. SPIE 10622, 2017 International Conference on Optical Instruments and Technology: Micro/Nano Photonics: Materials and Devices, 106220F (12 January 2018);


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