High-Speed MOS Imager And Ram Buffer System

John E. Tanner; Thormon O Ellison

doi:10.1117/12.952518

23 May 1989 High-Speed MOS Imager And Ram Buffer System

John E. Tanner, Thormon O Ellison

Proceedings Volume 1071, Optical Sensors and Electronic Photography; (1989) https://doi.org/10.1117/12.952518
Event: OE/LASE '89, 1989, Los Angeles, CA, United States

Abstract

A high-speed MOS imaging array prototype has been designed, fabricated, and tested. Preliminary tests of the 64 x 32 pixel device show imaging operation at more than 1000 frames per second. A 256 x 256 pixel array projected to achieve 2000 frames per second is under development. The sensor will be designed into a RAM based camcorder capable of storing 2000 frames of data. The camcorder will measure approximately 6" x 6" x 12" and contain 128Mbytes of dynamic RAM and 64 flash A/D converters. Camcorder outputs include standard video and a digital port.

Citation Download Citation

John E. Tanner and Thormon O Ellison "High-Speed MOS Imager And Ram Buffer System", Proc. SPIE 1071, Optical Sensors and Electronic Photography, (23 May 1989); https://doi.org/10.1117/12.952518

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