Paper
12 December 2018 Design and analysis of an analog signal readout circuit for SPAD
Xiang-Liang Jin, Duo-Duo Zeng, Hong-Jiao Yang, Yang Wang, Jun Luo
Author Affiliations +
Proceedings Volume 10845, Three-Dimensional Image Acquisition and Display Technology and Applications; 108450E (2018) https://doi.org/10.1117/12.2505035
Event: International Symposium on Optoelectronic Technology and Application 2018, 2018, Beijing, China
Abstract
-In this paper, an ultralow and high speed photocurrent analog signal readout circuit in order to amplify and process the output of SPAD(single-photon avalanche diodes) photocurrent is presented. The four main parts of the ASIC are low temperature coefficient(7.85ppm/°C) bandgap reference circuit, high linearity and high common-mode rejection ratio(120.6dB) operational amplifier, filter circuit and low-delay(63ns/1MHZ) comparator circuit. The SPAD readout chip is fabricated in a standard 0.5um CMOS process and size of 672um*780um. The simulation results indicate the chip successfully amplifies and processes 80nA and 1MHZ photocurrent analog signal. The circuit is fit for processing fleetness change and faint signal in CMOS image sensor of acquisition technology.
© (2018) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Xiang-Liang Jin, Duo-Duo Zeng, Hong-Jiao Yang, Yang Wang, and Jun Luo "Design and analysis of an analog signal readout circuit for SPAD", Proc. SPIE 10845, Three-Dimensional Image Acquisition and Display Technology and Applications, 108450E (12 December 2018); https://doi.org/10.1117/12.2505035
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KEYWORDS
Analog electronics

Signal processing

Amplifiers

Optical amplifiers

CMOS technology

CMOS sensors

Device simulation

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