Paper
26 March 2019 Engineering neural networks for improved defect detection and classification
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Abstract
Defects are ubiquitous in the semiconductor industry and detection, classification at various levels is a challenge and requires rigorous sampling. Every technology offers a new challenge in this area and requires numerous hours of setup, debug time for semiconductor integrated chip manufacturers. Intentional defects on patterns at various sizes in comparison to the critical dimension of a particular technology are used to preview their modulation and assess inspection tool performances. Figure 1 shows a few types of intentional defects as designed and their respective manifestation on a photomask. The chart also shows detection and printability limit and it varies by each defect type.1, 2

In recent years deep learning has made tremendous progress and has substantially improved the state-of-art in many applications that include object detection, speech recognition, and image classification3 The application and design of these deep learning tools in semiconductor defect recognition can be very useful, as it has the potential to reduce the setup time, cost and improving the overall (defect) detection and classification accuracy.

In this work we demonstrate the application of convolution neural networks on e-beam images of intentional defects on various types of patterns. We assess various filters and their outputs at each layer of a custom convolutional neural network (Figure 2) to ultimately improve the architecture and its accuracy. We also demonstrate the relative effectiveness of transfer learning in this application with limited availability of labelled data. Using the architecture illustrated in Figure 2 we are able to achieve a classification accuracy of 95%.
© (2019) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Dhruv Patel, Ravi Bonam, and Assad A. Oberai "Engineering neural networks for improved defect detection and classification", Proc. SPIE 10959, Metrology, Inspection, and Process Control for Microlithography XXXIII, 1095910 (26 March 2019); https://doi.org/10.1117/12.2515065
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Cited by 1 scholarly publication.
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KEYWORDS
Convolution

Defect detection

Semiconducting wafers

Inspection

Image classification

Neural networks

Convolutional neural networks

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