Presentation + Paper
23 March 2020 Rigorous simulation of implant resist on topographic wafer
Author Affiliations +
Abstract
The consideration of wafer topography effects in lithographic modeling of implant layers is mandatory for sub 32nm processes. The approximate assumption that both oxide- and resist thickness are independent of pattern design can lead to large model prediction errors and OPC correction failure. An implant lithography modeling flow based on rigorous models is presented that covers a) the STI stack formation and its etch–proximity effects, b) the resist spin-on and resulting thickness fluctuations, c) the image formation in the modeled stack and d) the chemical characterization of implant photoresist. This approach shows accuracy benefits and will be used to augment the existing OPC correction flow.
Conference Presentation
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Jirka Schatz, Bernd Küchler, Wolfgang Hoppe, and Dimitrios Tsamados "Rigorous simulation of implant resist on topographic wafer", Proc. SPIE 11327, Optical Microlithography XXXIII, 113270I (23 March 2020); https://doi.org/10.1117/12.2552102
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KEYWORDS
Semiconducting wafers

Silicon

Etching

Oxides

Ions

Photomasks

Optical proximity correction

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