Paper
1 November 1989 A Modular Ring Architecture for Large Scale Neural Network Implementations
Lance B. Jump, Panos A. Ligomenides
Author Affiliations +
Proceedings Volume 1199, Visual Communications and Image Processing IV; (1989) https://doi.org/10.1117/12.970122
Event: 1989 Symposium on Visual Communications, Image Processing, and Intelligent Robotics Systems, 1989, Philadelphia, PA, United States
Abstract
Constructing fully parallel, large scale, neural networks is complicated by the problems of providing for massive interconnectivity and of overcoming fan in/out limitations in area-efficient VLSI/WSI realizations. A modular, bus switched, neural ring architecture employing primitive ring (pRing) processors is proposed, which solves the fan in/out and connectivity problems by a dynamically reconfigurable communication ring that synchronously serves identical, radially connected, processing elements. It also allows cost versus performance trade-offs by the assignment of variable numbers of logical neurons to each physical processing element.
© (1989) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Lance B. Jump and Panos A. Ligomenides "A Modular Ring Architecture for Large Scale Neural Network Implementations", Proc. SPIE 1199, Visual Communications and Image Processing IV, (1 November 1989); https://doi.org/10.1117/12.970122
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Cited by 1 scholarly publication.
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KEYWORDS
Neural networks

Neurons

Computer architecture

Data communications

Image processing

Visual communications

Computing systems

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