A Multi-Processor Accelerator for 2D Image Handling

J. S. Sheblee; C. R. Allen; C. E. Goutis

doi:10.1117/12.970123

1 November 1989 A Multi-Processor Accelerator for 2D Image Handling

J. S. Sheblee, C. R. Allen, C. E. Goutis

Proceedings Volume 1199, Visual Communications and Image Processing IV; (1989) https://doi.org/10.1117/12.970123
Event: 1989 Symposium on Visual Communications, Image Processing, and Intelligent Robotics Systems, 1989, Philadelphia, PA, United States

Abstract

Requirements for the transmission and automatic compaction of complex imagery on local area networks is a rapidly developing field, driven by the needs of industry, commerce and medicine who require image based data on existing LAN computing systems. This paper describes an image processing accelerator architecture for application in the field of pictorial archiving and communication systems (PACS). The image handling system is designed to speed-up the performance of personal computers, and is being tested using data derived from endoscopic examination of patients attending the outpatient clinic in the department of Ear, Nose and Throat of a local hospital.

Citation Download Citation

J. S. Sheblee, C. R. Allen, and C. E. Goutis "A Multi-Processor Accelerator for 2D Image Handling", Proc. SPIE 1199, Visual Communications and Image Processing IV, (1 November 1989); https://doi.org/10.1117/12.970123

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