Poster + Paper
3 January 2023 An efficient and high-speed two-stage decoding scheme for continuous-variable quantum key distribution system
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Conference Poster
Abstract
The throughput of error correction is the main bottleneck of continuous variable quantum key distribution (CV-QKD) postprocessing. Implementing the decoder of low-density parity-check (LDPC) codes based on FPGA with limited precision can improve the decoding throughput significantly. However, the limited precision on FPGA results in the existence of residual error-bits after decoding, which lowers the secret key rate and restricts the application of high-rate real-time CVQKD system. In this paper, an efficient decoding scheme is proposed to erase the residual error-bits and decrease the frame errors rate (FER), where the decoding process into two stages and some values of initial Log Likelihood Ratio (LLR) are adjusted according to the proposed principles before starting the second-stage decoding. For the rates 0.2 and 0.1 LDPC codes, numerical results demonstrate that the proposed decoding scheme decreases the FER obviously and the throughputs of 152.47Mbps and 88.32Mbps are achieved, which can be applied to support high-speed CV-QKD system under transmission distance of 25km and 50km respectively.
© (2023) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Chuang Zhou, Yang Li, Li Ma, Yujie Luo, Wei Huang, Jie Yang, Jinlong Hu, Liangliang Zhang, Shuai Zhang, and Bingjie Xu "An efficient and high-speed two-stage decoding scheme for continuous-variable quantum key distribution system", Proc. SPIE 12323, Quantum and Nonlinear Optics IX, 1232309 (3 January 2023); https://doi.org/10.1117/12.2643810
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KEYWORDS
Field programmable gate arrays

Quantum key distribution

Signal to noise ratio

Reliability

Security technologies

Forward error correction

Telecommunications

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