Design and performance of low time jitter readout circuits based on SiPM

Ruiying Li

doi:10.1117/12.3033752

16 October 2024 Design and performance of low time jitter readout circuits based on SiPM

Ruiying Li

Author Affiliations +

Proceedings Volume 13291, Ninth International Symposium on Advances in Electrical, Electronics, and Computer Engineering (ISAEECE 2024); 1329117 (2024) https://doi.org/10.1117/12.3033752
Event: Ninth International Symposium on Advances in Electrical, Electronics, and Computer Engineering (ISAEECE 2024), 2024, Changchun, China

Abstract

Silicon Photomultipliers (SiPM) is a low light detection sensor with a wide range of applications. The readout circuits of SiPM need to be optimized for time jitter in applications that require high time performance. This paper reports three readout circuits for SiPM (Hamamatsu S14160-4050HS), using radio frequency (RF) amplification method, transimpedance (TIA) amplification method with voltage and current feedback operational amplifiers. The effect of different sampling resisters or feedback resisters on the signal rise time was tested. The increase of rise time when the sampling resistance is very small in the test results is simulated and analyzed, which is considered to be the influence of parasitic parameters. The time jitter of the SiPM at different overbias voltages was tested using three circuits. Among them, the time performance of RF circuit and current feedback TIA is better, and the time jitter of RF circuit can reach about 100 ps FWHM.

(2024) Published by SPIE. Downloading of the abstract is permitted for personal use only.

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Ruiying Li "Design and performance of low time jitter readout circuits based on SiPM", Proc. SPIE 13291, Ninth International Symposium on Advances in Electrical, Electronics, and Computer Engineering (ISAEECE 2024), 1329117 (16 October 2024); https://doi.org/10.1117/12.3033752

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KEYWORDS

Silicon photomultipliers

Radio frequency circuits

Design

Picosecond phenomena

Positron emission tomography

Sensors

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