Naval Research Laboratory flex processor for radar signal processing

James J. Alter; James B. Evins; J. P. Letellier

doi:10.1117/12.49831

1 December 1991 Naval Research Laboratory flex processor for radar signal processing

James J. Alter, James B. Evins, J. P. Letellier

Proceedings Volume 1566, Advanced Signal Processing Algorithms, Architectures, and Implementations II; (1991) https://doi.org/10.1117/12.49831
Event: San Diego, '91, 1991, San Diego, CA, United States

Abstract

This paper describes a programmable radar signal processor architecture developed at the Naval Research Laboratory (NRL). The design incorporates T.I. TMS320C30 programmable digital signal processor devices, Xilinx programmable gate arrays, TRW FFT devices, and a parallel array of Inmos Transputer microprocessors. The architecture is extremely flexible and is applicable to a wide variety of applications.

Citation Download Citation

James J. Alter, James B. Evins, and J. P. Letellier "Naval Research Laboratory flex processor for radar signal processing", Proc. SPIE 1566, Advanced Signal Processing Algorithms, Architectures, and Implementations II, (1 December 1991); https://doi.org/10.1117/12.49831

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