Paper
1 March 1992 ATM-based SMDS switch architecture and performance
Herbert M. Ruck
Author Affiliations +
Abstract
In the following paper we discuss the architecture, performance, and applications of an ATM based SMDS switch. The core is an ATM switch with 8 X 8 switching matrix with OC- 3c (155.520 Mbps) speed. The SNI interface for SMDS operates at DS3 (44.736 Mbps) rates. At the user side a SMDS router converts the output of a LAN to SMDS format and transmits the cells over DS3 to the switch. The first applications are linking computers connected to Ethernets and FDDI rings. Traffic is monitored on an OAM terminal and a cell count is provided for billing.
© (1992) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Herbert M. Ruck "ATM-based SMDS switch architecture and performance", Proc. SPIE 1577, High-Speed Fiber Networks and Channels, (1 March 1992); https://doi.org/10.1117/12.134905
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KEYWORDS
Switches

Asynchronous transfer mode

Local area networks

Computer architecture

Interfaces

Switching

Computing systems

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