Paper
1 June 1992 Response surface modeling utilizing lithographic process simulation
Bruce W. Smith, Wai-Man Shiao, Richard D. Holscher, Patricia F. Mahoney
Author Affiliations +
Abstract
A method of incorporating statistically designed fractional factorial experiments into lithographic process simulation software (PROLITH/2) has been used to determine input factor interrelationships inherent within a lithographic process. Rotatable Box-Behnken designs with three centerpoints were utilized for the experiment. The response surface methodology approach was used to analyze the influence of independent factors on a dependent response, and optimize each process. A `method of steepest ascent' was utilized to produce first-order models, which were verified by lack of fit testing. As optimum operating points were approached, a second-order model was fitted and analyzed. A series of experiments studying the effects of prebake, exposure, post-exposure bake, and development on critical dimension and profile in PROLITH/2 produced response surfaces relating each main factor effect as well as non-linear and interaction effects. Additionally, experiments were conducted studying effects of wavelength, numerical aperture, coherence, feature size, defocus, and flare on aerial image contrast. Process optimization for the target response value as well as process latitude as it relates to all factors simultaneously was then possible through use of the response surface.
© (1992) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Bruce W. Smith, Wai-Man Shiao, Richard D. Holscher, and Patricia F. Mahoney "Response surface modeling utilizing lithographic process simulation", Proc. SPIE 1673, Integrated Circuit Metrology, Inspection, and Process Control VI, (1 June 1992); https://doi.org/10.1117/12.59829
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Cited by 2 scholarly publications.
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KEYWORDS
Lithography

Image processing

Process modeling

Modeling

Statistical analysis

Coherence (optics)

Integrated circuits

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