Surface defect inspection system with an optical spatial frequency filter for semiconductor patterned wafers

Yoko Miyazaki; Hitoshi Tanaka; Nobuyuki Kosaka; Toshimasa Tomoda

doi:10.1117/12.59810

1 June 1992 Surface defect inspection system with an optical spatial frequency filter for semiconductor patterned wafers

Yoko Miyazaki, Hitoshi Tanaka, Nobuyuki Kosaka, Toshimasa Tomoda

Author Affiliations +

Proceedings Volume 1673, Integrated Circuit Metrology, Inspection, and Process Control VI; (1992) https://doi.org/10.1117/12.59810
Event: Microlithography '92, 1992, San Jose, CA, United States

Abstract

We previously developed a surface defect inspection system for semiconductor patterned wafers. The system utilizes spatial frequency technology, where regular periodic patterns were eliminated, and only defects are imaged at the image plane by using a spatial frequency filter. The system had a detection sensitivity of 0.8 micrometers and an inspection speed of 30 minutes for the 6 inch wafer. With the advent of 16 MDRAMs having a design rule of 0.5 micrometers , however, higher detection sensitivity of about 0.3 micrometers is required. Thus, we have been developing an advanced inspection system based on the previous achievement to meet the emerging needs. The problem to tackle is the signal-to-noise-ratio (SNR) improvement. To achieve higher SNR on the filtered image, we introduced the following two ideas: (1) angled incidence of the laser on the wafer surface and the avoidance of regular reflection light entering the optical system, and (2) a spatial filter which is composed of two photo-plates facing each other. We have developed an optical imaging system and have experimentally shown that the system images defects down to 0.2 micrometers with adequate SNR with a view field of 1000 X 1000 micrometers .

Citation Download Citation

Yoko Miyazaki, Hitoshi Tanaka, Nobuyuki Kosaka, and Toshimasa Tomoda "Surface defect inspection system with an optical spatial frequency filter for semiconductor patterned wafers", Proc. SPIE 1673, Integrated Circuit Metrology, Inspection, and Process Control VI, (1 June 1992); https://doi.org/10.1117/12.59810

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available