Paper
1 July 1992 Step-by-step design of a gain-adjustable neuron cell
Chiewcharn Narathong, J. Staab, S. Geiger
Author Affiliations +
Abstract
The objective of this research project is to develop an optimally sized analog CMOS neuron cell library. This neuron cell together with the optimal synapse developed previously can be used to construct a high density VLSI neural network. The standard cell library allows a neural network designer to concentrate on applying his/her networks as well as evaluating learning algorithms. In order to achieve this objective, a set of optimal design equations was derived from standard CMOS equations. This paper includes both the derivation of the design equations and the evaluation of the size (silicon area) and performance of the neuron cell.
© (1992) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Chiewcharn Narathong, J. Staab, and S. Geiger "Step-by-step design of a gain-adjustable neuron cell", Proc. SPIE 1710, Science of Artificial Neural Networks, (1 July 1992); https://doi.org/10.1117/12.140084
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CITATIONS
Cited by 2 scholarly publications.
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KEYWORDS
Neurons

Transistors

Neural networks

Analog electronics

Artificial neural networks

Device simulation

Picosecond phenomena

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