Paper
19 January 1995 Table-type modular arithmetic processors for digital image processing
A. Kolyada, E. Otlivanchik, V. Revinsky, A. Vasilevitch
Author Affiliations +
Proceedings Volume 2363, 5th International Workshop on Digital Image Processing and Computer Graphics (DIP-94); (1995) https://doi.org/10.1117/12.199626
Event: Digital Image Processing and Computer Graphics: Fifth International Workshop, 1994, Samara, Russian Federation
Abstract
Implementation of real-time digital image processing, which is needed in a variety of modern scientific and technical applications, involves considerable difficulties. These difficulties occur because of rigid requirements on the speed of the hardware used. An application of a complex designing concept of high-speed systems for digital image processing (DIP) gives us the tools for solving some of the problems. The new direction of research and development for solving these problems consists in the introduction of pipeline LSI and VLSI table type structure devices. This article suggests an approach based on computer arithmetic using the mew modification of classic modular number system (MNS) -- minimal redundant modular number system.
© (1995) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
A. Kolyada, E. Otlivanchik, V. Revinsky, and A. Vasilevitch "Table-type modular arithmetic processors for digital image processing", Proc. SPIE 2363, 5th International Workshop on Digital Image Processing and Computer Graphics (DIP-94), (19 January 1995); https://doi.org/10.1117/12.199626
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KEYWORDS
Image processing

Digital image processing

Computing systems

Binary data

Very large scale integration

Algorithm development

Computer arithmetic

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