Electrical test structures replicated in silicon-on-insulator material

Michael W. Cresswell; Jeffry J. Sniegowski; Rathindra N. Ghoshtagore; Richard A. Allen; Loren W. Linholm; John S. Villarrubia

doi:10.1117/12.240117

21 May 1996 Electrical test structures replicated in silicon-on-insulator material

Michael W. Cresswell, Jeffry J. Sniegowski, Rathindra N. Ghoshtagore, Richard A. Allen, Loren W. Linholm, John S. Villarrubia

Author Affiliations +

Proceedings Volume 2725, Metrology, Inspection, and Process Control for Microlithography X; (1996) https://doi.org/10.1117/12.240117
Event: SPIE's 1996 International Symposium on Microlithography, 1996, Santa Clara, CA, United States

Abstract

Measurements of the linewidths of submicrometer features made by different metrology techniques have frequently been characterized by differences of up to 90 nm. The purpose of the work reported here is to address the special difficulties that this phenomenon presents to the certification of reference materials for the calibration of linewidth-measurement instruments. Accordingly, a new test structure has been designed and fabricated, and has undergone preliminary tests. Its distinguishing characteristics are assured cross-sectional profile geometries with known side-wall slopes, surface planarity, and compositional uniformity when it is formed in mono-crystalline material at selected orientations to the crystal lattice. To allow the extraction of electrical linewidth, the structure is replicated in a silicon film of uniform conductivity which is separated from the silicon substrate by a buried oxide layer. The utilization of a silicon-on-insulator (SOI) substrate further allows the selective removal of substrate material from local regions below the reference features, thus facilitating measurements by optical and electron-beam transmission microcopy. The combination of planar feature surfaces having known side-wall slopes is anticipated to eliminate factors which are believed to be responsible for methods divergence in linewidth measurements, a capability which is a prerequisite for reliable certification of the linewidths of features on reference materials.

Citation Download Citation

Michael W. Cresswell, Jeffry J. Sniegowski, Rathindra N. Ghoshtagore, Richard A. Allen, Loren W. Linholm, and John S. Villarrubia "Electrical test structures replicated in silicon-on-insulator material", Proc. SPIE 2725, Metrology, Inspection, and Process Control for Microlithography X, (21 May 1996); https://doi.org/10.1117/12.240117

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available