Rapid prototyping of datapath intensive architectures with HML: an abstract hardware description language

Miriam E. Leeser; Shantanu Tarafdar; Yanbing Li

doi:10.1117/12.255823

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21 October 1996 Rapid prototyping of datapath intensive architectures with HML: an abstract hardware description language

Miriam E. Leeser, Shantanu Tarafdar, Yanbing Li

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Proceedings Volume 2914, High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic; (1996) https://doi.org/10.1117/12.255823
Event: Photonics East '96, 1996, Boston, MA, United States

Abstract

HML allows us to specify hardware at a very abstract level, and automatically generate VHDL from our specifications. The VHDL is used along with commercial CAD tools to generate field programmable logic. In this paper we present HML, a hardware description language based on SML, and discuss the translation process from HML to VHDL. As an example we use HML to specify a DTMF receiver. We present the HML for a Booth multiplier and discuss the design flow from HML to an FPGA implementation of that multiplier. HML is the only language available that applies advances in programming languages and type theory to hardware description.

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Miriam E. Leeser, Shantanu Tarafdar, and Yanbing Li "Rapid prototyping of datapath intensive architectures with HML: an abstract hardware description language", Proc. SPIE 2914, High-Speed Computing, Digital Signal Processing, and Filtering Using Reconfigurable Logic, (21 October 1996); https://doi.org/10.1117/12.255823

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