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27 December 1996 Noise degradation and fault tolerance in annealed binary-phase hologram interconnections
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Proceedings Volume 2969, Second International Conference on Optical Information Processing; (1996) https://doi.org/10.1117/12.262601
Event: Second International Conference on Optical Information Processing, 1996, St. Petersburg, Russian Federation
Abstract
Binary, computer-generated phase holograms can be displayed on a ferroelectric liquid crystal over silicon spatial light modulator to give a high-speed switchable interconnection element. However, these devices are prone to fabrication defects, including non-operational pixels, variations in the liquid crystal cell thickness and warping of the silicon backplane. We investigate the effects of these fabrication faults on hologram efficiency by modelling them in software, and test the ability of the iterative design technique to compensate for such defects. Evidence of back-plane and cell thickness faults in 256 by 256 pixel binary FLC over silicon SLMs is presented and discussed. A projected optical design scheme that removes the requirement for the mapping of defects on a particular SLM is outlined.
© (1996) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Patrick J. Smith, Sergei Samus, William J. Hossack, and David G. Vass "Noise degradation and fault tolerance in annealed binary-phase hologram interconnections", Proc. SPIE 2969, Second International Conference on Optical Information Processing, (27 December 1996); https://doi.org/10.1117/12.262601
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