Statistical effects of plasma etch damage on hot-carrier degradation

Bharat L. Bhuva; Vijay Janapaty; N. Bui; Sherra E. Kerns

doi:10.1117/12.284696

11 September 1997 Statistical effects of plasma etch damage on hot-carrier degradation

Bharat L. Bhuva, Vijay Janapaty, N. Bui, Sherra E. Kerns

Proceedings Volume 3216, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis III; (1997) https://doi.org/10.1117/12.284696
Event: Microelectronic Manufacturing, 1997, Austin, TX, United States

Abstract

During plasma etch steps, devices are exposed directly to plasma and charge collection/deposition onto aluminum or poly damage gate oxides. This damage results in higher subsequent hot-carrier degradation. Here, the statistical variations in waler-level hot-carrier degradations are investigated. Interface-trap formation is shown to be independent of antenna size across a wafer, while bulk oxide trapping center density is found to be highly dependent on the antenna size and type.

Citation Download Citation

Bharat L. Bhuva, Vijay Janapaty, N. Bui, and Sherra E. Kerns "Statistical effects of plasma etch damage on hot-carrier degradation", Proc. SPIE 3216, Microelectronic Manufacturing Yield, Reliability, and Failure Analysis III, (11 September 1997); https://doi.org/10.1117/12.284696

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