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1 April 1998 Memory read-out approach for a 0.5-μm CMOS image sensor
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Proceedings Volume 3301, Solid State Sensor Arrays: Development and Applications II; (1998) https://doi.org/10.1117/12.304557
Event: Photonics West '98 Electronic Imaging, 1998, San Jose, CA, United States
Abstract
In image sensors with passive pixels the column capacitance is large compared to the capacitance of the pixel. The charge-to-voltage conversion occurs in the column amplifier relatively far from the pixel. This may result in a high sensitivity to interference, especially in cases other electronic circuitry is located on the same chip. Two types of CIF CMOS imagers are presented that use different read- out options to counter this effect. Both designs use differential read-out as DRAM's do. This means that the pixel is compared to a reference cell. The first type uses a reference cell on the same row; the second type utilizes a fully symmetrical way of read-out, similar to digital memories by having this reference on the same column. Furthermore, two other means of image quality improvement are applied. A boost circuit is sued to generate a negative voltage for driving the selecting transistor to insure that it is completely switched on during pixel reset. By this, threshold differences between pixels do not affect the reset voltage. The second is a well thought-out column amplifier that calibrates its offset before reading the pixel information.
© (1998) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Willem Hoekstra, Andre van der Avoird, Marq Kole, Guido G. Schrooten, and Chris J. Schaeffer "Memory read-out approach for a 0.5-μm CMOS image sensor", Proc. SPIE 3301, Solid State Sensor Arrays: Development and Applications II, (1 April 1998); https://doi.org/10.1117/12.304557
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