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21 August 1998 Evaluation of charge-integrating amplifier with silicon MOSFETs for cryogenic readout
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Abstract
Low-noise and low-power cryogenic readout electronics are developed for a focal plane instrument of the IR Imaging Surveyor. We measured the static characteristics and the noise spectra of several types of silicon MOSFETs at the cryogenic temperature where silicon JFETs do not work well due to the carrier freeze-out. The 'kink' behavior of n- channel MOSFETs was observed below the carrier freeze-out temperature, but it was not obvious for the p-channel MOSFET. It was demonstrated the p-channel MOSFETs can be used for the cryogenic readout electronics of the IRIS's far-IR array with an acceptable performance. The amplifier integrated with these MOSFETs showed low-noise at 2K under a low power consumption of 1 (mu) W per MOSFET. We now design and evaluate several circuits that are fabricated by the CMOS process for cryogenic readout.
© (1998) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Manabu Noda, Hiroshi Shibai, Toyoki Watabe, Takanori Hirao, Hiroyuki Yoda, Hirohisa Nagata, Takao Nakagawa, and Mitsunobu Kawada "Evaluation of charge-integrating amplifier with silicon MOSFETs for cryogenic readout", Proc. SPIE 3354, Infrared Astronomical Instrumentation, (21 August 1998); https://doi.org/10.1117/12.317306
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