On-chip circuitry for a CMOS parallel scanning AFM

Christoph Hagleitner; Dirk Lange; Terunobu Akiyama; A. Tonin; Rolf Vogt; Henry Baltes

doi:10.1117/12.354275

20 July 1999 On-chip circuitry for a CMOS parallel scanning AFM

Christoph Hagleitner, Dirk Lange, Terunobu Akiyama, A. Tonin, Rolf Vogt, Henry Baltes

Proceedings Volume 3673, Smart Structures and Materials 1999: Smart Electronics and MEMS; (1999) https://doi.org/10.1117/12.354275
Event: 1999 Symposium on Smart Structures and Materials, 1999, Newport Beach, CA, United States

Abstract

We present on-chip signal conditioning circuitry for the first parallel scanning Atomic Force Microscope sensors fabricated in industrial CMOS technology. The system combines, on a single chip, (1) two cantilevers for parallel scanning, (2) thermal actuators for independent deflection of the two cantilevers, (3) sensors to measure the deflection and (4) offset compensation and signal conditioning circuitry. It was fabricated using the 2.0 micrometers CMOS process of Austria Mikro Systeme and CMOS compatible post-processing micromachining. Scanning images were successfully acquired in contact and dynamic mode. The resolution of the recorded tapping mode images is better than 20 angstroms.

Citation Download Citation

Christoph Hagleitner, Dirk Lange, Terunobu Akiyama, A. Tonin, Rolf Vogt, and Henry Baltes "On-chip circuitry for a CMOS parallel scanning AFM", Proc. SPIE 3673, Smart Structures and Materials 1999: Smart Electronics and MEMS, (20 July 1999); https://doi.org/10.1117/12.354275

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