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19 July 2000 Gate CD control for full chip using total-process-proximity-based correction method
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Proceedings Volume 4066, Photomask and Next-Generation Lithography Mask Technology VII; (2000) https://doi.org/10.1117/12.392101
Event: Photomask and Next Generation Lithography Mask Technology VII, 2000, Kanagawa, Japan
Abstract
In this study, we investigated mask errors, photo errors with attenuated phase shift mask and off-axis illumination, and etch errors in dry etch condition. We propose that total process proximity correction (TPPC), a concept merging every step error correction, is essential in lithography process when minimum critical dimension (CD) smaller than the wavelength of radiation. A correction rule table was experimentally obtained applying TPPC concept. Process capability of controlling gate CD in DRAM fabrication should be improved by this method.
© (2000) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Byung-Ho Nam, Jong O Park, Dai Jong Lee, Jong Ho Cheong, Young Ju Hwang, and Young Jin Song "Gate CD control for full chip using total-process-proximity-based correction method", Proc. SPIE 4066, Photomask and Next-Generation Lithography Mask Technology VII, (19 July 2000); https://doi.org/10.1117/12.392101
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