Paper
17 November 2000 Dynamic adaptive parallel architecture integrates advanced technologies for petaflops-scale computing
Thomas L. Sterling
Author Affiliations +
Abstract
Teraflops-scale computing systems are becoming available to an increasingly broad range of users as the performance of the constituent processing elements increases and their relative cost (e.g. per Mflops) decreases. To the original DOE ASCI Red machine has been added the ASCI Blue systems and additional 1 Teraflops commercial systems at key national centers. Clusters of low cost PCs employing COTS network technologies (e.g. Beowulf-class systems) will make peak Teraflops performance available for less than 2M in the near future for certain classes of well behaved problems. Future larger systems include the Japanese Earth Simulator with a peak performance of 40 Teraflops and three larger ASCI systems anticipated to provide peak performance of 10, 30, and 100 Teraflops culminating in 2005. These systems use existing or near term conventional technologies and architectures with some specialized integration logic and networking. While the peak performance goals can be satisfied through this strategy over the next decade, two major challenges confront the high performance computing community: (1) how to aggressively accelerate performance to the operational regime beyond a Petaflops, and (2) how to achieve high efficiency for a wide range of applications. The Hybrid Technology Multithreaded (HTMT) computer is under development by an interdisciplinary team of investigators to address both problems through an innovative combination of advanced technologies and dynamic adaptive architecture. This paper describes the strategy embodied by the HTMT architecture and discusses the key factors that may enable it to achieve two to three orders of magnitude performance with respect to today's largest systems at a cost and power consumption of only a factor of two to three times those same present day systems.
© (2000) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Thomas L. Sterling "Dynamic adaptive parallel architecture integrates advanced technologies for petaflops-scale computing", Proc. SPIE 4109, Critical Technologies for the Future of Computing, (17 November 2000); https://doi.org/10.1117/12.409225
Lens.org Logo
CITATIONS
Cited by 2 scholarly publications.
Advertisement
Advertisement
RIGHTS & PERMISSIONS
Get copyright permission  Get copyright permission on Copyright Marketplace
KEYWORDS
Computing systems

Logic

Clocks

Computer architecture

Superconductors

Semiconductors

Switching

RELATED CONTENT

Digital optical computers at Boulder
Proceedings of SPIE (September 01 1991)
Fama Architecture: Implementation Details
Proceedings of SPIE (October 19 1987)
Architectural Aspects Of Optical Computing
Proceedings of SPIE (November 10 1987)
An open source synthesisable model in VHDL of a 64...
Proceedings of SPIE (January 11 2007)

Back to Top