Lithography technology trend for DRAM devices

Woo-Sung Han

doi:10.1117/12.477003

1 August 2002 Lithography technology trend for DRAM devices

Woo-Sung Han

Proceedings Volume 4754, Photomask and Next-Generation Lithography Mask Technology IX; (2002) https://doi.org/10.1117/12.477003
Event: Photomask and Next Generation Lithography Mask Technology IX, 2002, Yokohama, Japan

Abstract

Lithography technology trend is described in view of DRAM devices. Lowering k₁ factor is a way to push the existing exposure tools further down to where an improved tool might take the place. Four different aspects have been studied to lower k₁ factor: resist and resist process, design layout, exposure tool, and complex mask. Thin resist, silicon containing bi-layer resist process, and chemical attaching process (CAP) allows k₁ factor. In a low k₁ factor regime, the importance of a defect level control and CD shrinkage control is mentioned. A litho-friendly design proves to be very effective. From exposure tool point of view, flare effect and lens aberration effect are stressed along with proposing a customized OAI, which proves to be a good method to lower k₁ factor. A novel complex mask with heavy OPC features is introduced. If all or most of the techniques suggested above are realized, moving toward k₁ facto of 0.3 or below will come true. With the era of low k₁ factor of 0.3 or below, ArF lithography can be extended to a device generation of approximately 65 nm which F₂ lithography was thought to be used.

Citation Download Citation

Woo-Sung Han "Lithography technology trend for DRAM devices", Proc. SPIE 4754, Photomask and Next-Generation Lithography Mask Technology IX, (1 August 2002); https://doi.org/10.1117/12.477003

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