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23 January 2003 Focal plane processor with a digital video output for InSb detectors
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A high performance FPP for a 640x512 infrared detector has been developed at SCD, comprising an internal analog to digital conversion. The conversion resolution is 13/15 bits, selectable via a serial communication channel. The focal plane power dissipation at an output rate of 100 Frames per Second is less than 130mW, yielding about 0.1 pJ/conversion bit. A 0.5 micron double poly triple metal process was used, yielding a pixel capacity of greater or equal to 13 Me-. The serial communication link enables also user control of the operating modes, full-scale range gain and windowing. The processor is designed as a multi-chip system with an external FPGA, enabling an un-usual flexibility and easy adaptation to the external system.
© (2003) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Shimon Elkind, Amnon Adin, Itsik Nevo, and Arkady Marhasev "Focal plane processor with a digital video output for InSb detectors", Proc. SPIE 4820, Infrared Technology and Applications XXVIII, (23 January 2003);

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