Translator Disclaimer
Paper
9 July 2003 Design of 2.5Gb/s CMOS optical transceiver array
Author Affiliations +
Proceedings Volume 4998, Photonic Integrated Systems; (2003) https://doi.org/10.1117/12.476543
Event: Integrated Optoelectronics Devices, 2003, San Jose, CA, United States
Abstract
We describe design of 2.5Gb/s CMOS optical transceiver array using 0.35 mm CMOS technology. The transceiver array consists of Laser Diode (LD) driver and limiting amplifier with current decision circuit. CMOS LD driver offers the capability of independent DC and modulation current adjustments. The DC component used to pre-bias the LD is adjustable at a range of 0~30 mA. Optical receiver consists of current decision circuit with voltage output buffer. Optical receiver allows wide dynamic range of input current. The decision circuit uses positive feedback from the cross-gate connection of two NMOSs to increase the gain of the decision element, while the output buffer convert the output of the decision circuit into a logic signal(i.e., 0 or 3.3V). With this design technique, we have succeeded in developing a CMOS optical transceiver array with high performance.
© (2003) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Kyung-Jik Lee, Hee-Hyun Lee, Sang-Bong Lee, and Young-Wan Choi "Design of 2.5Gb/s CMOS optical transceiver array", Proc. SPIE 4998, Photonic Integrated Systems, (9 July 2003); https://doi.org/10.1117/12.476543
PROCEEDINGS
8 PAGES


SHARE
Advertisement
Advertisement
RELATED CONTENT

A CMOS current to voltage linear conversion for low input...
Proceedings of SPIE (January 11 2007)
Single-HBT-based optical receiver front-end
Proceedings of SPIE (June 16 2004)
10 Gb/s CMOS photonics technology
Proceedings of SPIE (February 10 2006)

Back to Top