Translator Disclaimer
Paper
16 May 2003 Versatile sensor interface for programmable vision systems-on-chip
Author Affiliations +
Abstract
This paper describes an optical sensor interface designed for a programmable mixed-signal vision chip. This chip has been designed and manufactured in a standard 0.35μm n-well CMOS technology with one poly layer and five metal layers. It contains a digital shell for control and data interchange, and a central array of 128 × 128 identical cells, each cell corresponding to a pixel. Die size is 11.885 × 12.230mm2 and cell size is 75.7μm × 73.3μm. Each cell contains 198 transistors dedicated to functions like processing, storage, and sensing. The system is oriented to real-time, single-chip image acquisition and processing. Since each pixel performs the basic functions of sensing, processing and storage, data transferences are fully parallel (image-wide). The programmability of the processing functions enables the realization of complex image processing functions based on the sequential application of simpler operations. This paper provides a general overview of the system architecture and functionality, with special emphasis on the optical interface.
© (2003) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Angel Rodriguez-Vazquez, Gustavo Linan, Elisenda Roca, Servando Espejo, and Rafael Dominguez-Castro "Versatile sensor interface for programmable vision systems-on-chip", Proc. SPIE 5017, Sensors and Camera Systems for Scientific, Industrial, and Digital Photography Applications IV, (16 May 2003); https://doi.org/10.1117/12.476791
PROCEEDINGS
10 PAGES


SHARE
Advertisement
Advertisement
RELATED CONTENT


Back to Top