Effects of processing parameters on line-width roughtness

Bryan J. Rice; Heidi B. Cao; Manish Chandhok; Robert P. Meagley

doi:10.1117/12.485162

12 June 2003 Effects of processing parameters on line-width roughness

Bryan J. Rice, Heidi B. Cao, Manish Chandhok, Robert P. Meagley

Proceedings Volume 5039, Advances in Resist Technology and Processing XX; (2003) https://doi.org/10.1117/12.485162
Event: Microlithography 2003, 2003, Santa Clara, California, United States

Abstract

Line width roughness (LWR), transferred from a patterned photoresist to a gate during the etch process, may have a significant effect on the device performance beginning with the 65 nm technology node. Two factors that make LWR a greater concern for this node than for previous technology nodes are: 1) LWR does not scale in proportion to the critical dimensions (CDs), and 2) LWR has been shown to increase as film thickness decreases. A significant challenge for this technology node is the development of a resist process with sufficiently low LWR. In this paper, we investigate the effect that changing processing conditions has on LWR. We begin by reviewing the literature to determine which processing parameters have been shown to impact LWR. We then present experimental results that show how variations in processing parameters affect LWR. We conclude with molecular data showing the relation between resist surface roughness and LWR.

Citation Download Citation

Bryan J. Rice, Heidi B. Cao, Manish Chandhok, and Robert P. Meagley "Effects of processing parameters on line-width roughness", Proc. SPIE 5039, Advances in Resist Technology and Processing XX, (12 June 2003); https://doi.org/10.1117/12.485162

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