Impact of downscaling on high-frequency noise performance of bulk and SOI MOSFETs

Gilles Dambrine; C. Raynaud; M. Vanmackelberg; Francois Danneville; Guillaume Pailloncy; Sylvie Lepilliet; Jean Pierre Raskin

doi:10.1117/12.497141

12 May 2003 Impact of down scaling on high-frequency noise performance of bulk and SOI MOSFETs

Gilles Dambrine, C. Raynaud, M. Vanmackelberg, Francois Danneville, Guillaume Pailloncy, Sylvie Lepilliet, Jean Pierre Raskin

Author Affiliations +

Proceedings Volume 5113, Noise in Devices and Circuits; (2003) https://doi.org/10.1117/12.497141
Event: SPIE's First International Symposium on Fluctuations and Noise, 2003, Santa Fe, New Mexico, United States

Abstract

Parameters limiting the improvement of high frequency characteristics for deep sub micron MOSFETs (bulk and SOI) with the downscaling process of the channel gate length are analyzed experimentally. The high frequency performances of MOSFETs are generally characterized by the specific transit frequencies ft, f_max. ft and/or f_max, what is the good factor of merit to quantify the performance of a transistor ft, which corresponds to the transit frequency (when the gain is equal to 1) of the current gain, is an interesting criterion for high speed digital applications (speed and high swing) while f_max, which is defined as the transit frequency of the unilateral power gain is the best criterion for analogue microwave applications (amplifier, oscillators, etc.). f_max corresponds also to the transit frequency of the maximum available power gain (MAG) that is a realistic parameter of the optimization of microwave amplifiers. Moreover, at the opposite of ft, f_max includes the contribution of the gate resistance, which degrades the high frequency noise performance. The different contributions of the extrinsic and intrinsic parameters on these transit frequencies will be detailed. We will support this analysis by experimental results obtained from several deep sub micron SOI and bulk MOSFETs technologies. We will focus essentially this presentation on the different technological ways of optimization on the high frequency performance of MOSFETs and particularly concerning its high frequency noise characteristics.

Citation Download Citation

Gilles Dambrine, C. Raynaud, M. Vanmackelberg, Francois Danneville, Guillaume Pailloncy, Sylvie Lepilliet, and Jean Pierre Raskin "Impact of down scaling on high-frequency noise performance of bulk and SOI MOSFETs", Proc. SPIE 5113, Noise in Devices and Circuits, (12 May 2003); https://doi.org/10.1117/12.497141

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