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21 April 2003 Temperature in HFETs when operating in DC
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Proceedings Volume 5117, VLSI Circuits and Systems; (2003)
Event: Microtechnologies for the New Millennium 2003, 2003, Maspalomas, Gran Canaria, Canary Islands, Spain
This work analyses the DC response of an InGaAs channel PHFET when varying temperature. An analytic model for the drain current is derived from previous work, incorporating the extrinsic resistances. Experimental output characteristics at different temperatures are compared with those offered by the resulting model and numerical simulations. The DC drain current is obtained introducing the external voltages applied to the HFET terminals into an intrinsic model. The temperature range considered in this paper is between 300 and 400 K. In this range, the temperature dependence of the intrinsic electrical parameters is included in the model. For the temperature dependence of the extrinsic resistances, the HFET is numerically simulated with MINIMOS-NT. As far as we know, any influence of the electron transport through the AlGaAs/InGaAs heterojunction on the extrinsic resistances has not been already established. In our case, a termionic-field-emission (TFE) is used to simulate this effect (without TFE not only the drain current is underestimated, but also the temperature dependence predicted is opposite to the actual). As result, the extrinsic source resistence is nearly constant (7.5 ohms), and higher values are obtained for the extrinsic drain resistence, which has a linear and positive temperature dependence, raising as the transistor operates in saturation region. When the drain voltage diminishes, the influence of the TFE model on the extrinsic resistances vanishes, and RD tends to RS. The drain current predicted by the model, in linear and saturation region, shows a relative error between measured and modeled values smaller than 10%.
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Benito Gonzalez, Antonio Hernandez, Javier Garcia, F. Javier del Pino, Antonio Nunez, and Jose Ramón Sendra "Temperature in HFETs when operating in DC", Proc. SPIE 5117, VLSI Circuits and Systems, (21 April 2003);

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