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19 August 2003 Optical header processing in high-speed optical networks
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There is an increasing interest in performing many key networking functions in the optical domain to achieve bit rate transparency. Optical header processing is one such key function that may enable fast reading and forwarding of optical packets in the future all-optical packet-switched core network. Many of these optical header processing functions are enabled through the use of all-optical logic gates. The logic XOR gate is of key importance in decision and comparator circuits. A novel architecture of an N-bit logic XOR gate based on a Mach-Zehnder interferometer with feedback is proposed and its performance evaluated by means of simulations. Basically, this architecture consists of an integrated semiconductor-optical-amplifier-based Mach-Zehnder interferometer (SOA-MZI), an optical pulsed control signal, a differential transmission scheme for the input data sequences, and a feedback network. The simulation results show error-free operation at 40 Gbit/s for 16-bit-length words with extinction ratio values better than 16 dB. Furthermore, simulation results of the data power threshold needed for obtaining error-free operation as a function of the peak power of the control pulses are also presented, showing an optimum operating point at about 8 mW. An important application for the proposed SOA-MZI architecture is label processing directly at the optical domain in high-speed all-optical label swapping networks.
© (2003) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Francisco Ramos, Jose Manuel Martinez, Karsten Schulze, Javier Marti, Roberto Llorente, and Raquel Clavero "Optical header processing in high-speed optical networks", Proc. SPIE 5247, Optical Transmission Systems and Equipment for WDM Networking II, (19 August 2003);


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