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30 December 2003 Wafer-level vacuum packaging technology based on selective electroplating
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Proceedings Volume 5342, Micromachining and Microfabrication Process Technology IX; (2003) https://doi.org/10.1117/12.525802
Event: Micromachining and Microfabrication, 2004, San Jose, California, United States
Abstract
A novel concept for low-cost, wafer-level packaging of MEMS is proposed and applied to vacuum packaging of INO’s 160x120 pixel uncooled bolometric focal plane arrays, FPAs, based on vanadium oxide thermistor material. A wafer-scale metallic tray composed of several tens of micropackages is electroplated by using the thick resist SU-8 as a micromold. FPA dies and infrared windows are then soldered to the main tray by flip-chip bonding. Contrary to the conventional wafer to wafer bonding approach, assembly and vacuum sealing steps are dissociated. For this purpose, each micropackage is equipped with a pump-out hole for outgassing under vacuum and at elevated temperature prior to vacuum sealing. The process flow for fabrication of micropackages is described. The influence of DC and pulse plating conditions on the stress and properties of deposited nickel packages was investigated. Results on the selective electroplating of indium solder on antireflection-coated IR window wafers and the formation of a solderable layer around the chip are presented.
© (2003) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Patrice A. Topart, Sebastien Leclair, Christine Alain, and Hubert Jerominek "Wafer-level vacuum packaging technology based on selective electroplating", Proc. SPIE 5342, Micromachining and Microfabrication Process Technology IX, (30 December 2003); https://doi.org/10.1117/12.525802
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