Paper
24 May 2004 Experimental methodology of contact edge roughness on sub-100-nm pattern
Tae Yong Lee, Dongchul Ihm, Hyo Chun Kang, Jun Bum Lee, Byoung-Ho Lee, Soo-Bok Chin, Do-Hyun Cho, Yang Hyong Kim, Ho Dong Yang, Kyoung Mo Yang
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Abstract
The measurement of edge roughness has become a hot issue in the semiconductor industry. Major vendors offer a variety of features to measure the edge roughness in their CD-SEMs. However, most of the features are limited by the applicable pattern types. For the line and space patterns, features such as Line Edge Roughness (LER) and Line Width Roughness (LWR) are available in current CD-SEMs. The edge roughness is more critical in contact process. However the measurement of contact edge roughness (CER) or contact space roughness (CSR) is more complicated than that of LER or LWR. So far, no formal standard measurement algorithm or definition of contact roughness measurement exists. In this article, currently available features are investigated to assess their representability for CER or CSR. Some new ideas to quantify CER and CSR were also suggested with preliminary experimental results.
© (2004) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Tae Yong Lee, Dongchul Ihm, Hyo Chun Kang, Jun Bum Lee, Byoung-Ho Lee, Soo-Bok Chin, Do-Hyun Cho, Yang Hyong Kim, Ho Dong Yang, and Kyoung Mo Yang "Experimental methodology of contact edge roughness on sub-100-nm pattern", Proc. SPIE 5375, Metrology, Inspection, and Process Control for Microlithography XVIII, (24 May 2004); https://doi.org/10.1117/12.534496
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KEYWORDS
Semiconducting wafers

Edge roughness

Line width roughness

Line edge roughness

Critical dimension metrology

Semiconductors

Distortion

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