Development of a LEEPL mask: flatness and IP measurements

Yuuki Aritsuka; Minoru Kitada; Masaru Kurosawa; Tadahiko Takikawa; Hiroshi Fujita; Hisatake Sano; Morihisa Hoga; Naoya Hayashi

doi:10.1117/12.557777

20 August 2004 Development of a LEEPL mask: flatness and IP measurements

Yuuki Aritsuka, Minoru Kitada, Masaru Kurosawa, Tadahiko Takikawa, Hiroshi Fujita, Hisatake Sano, Morihisa Hoga, Naoya Hayashi

Author Affiliations +

Proceedings Volume 5446, Photomask and Next-Generation Lithography Mask Technology XI; (2004) https://doi.org/10.1117/12.557777
Event: Photomask and Next Generation Lithography Mask Technology XI, 2004, Yokohama, Japan

Abstract

Masks for low energy electron proximity projection lithography (LEEPL) are fabricated starting with 200 mm silicon-on-insulator (SOI) wafers. The effect of the thickness of the buried oxide (BOX) layer of an SOI wafer on its flatness has been investigated. The wafer flatness is found to decrease as the BOX layer becomes thin. When the SOI layer (Si membrane) is not doped by B or P, the membrane has a compressive stress even for a 0.2 μm thick BOX layer. A monitor mask with image placement (IP) marks on a single-large (24 mm square) membrane area has been fabricated, starting with an SOI wafer with an 1.1 μm thick stress-controlled SOI layer and a 0.2 μm thick BOX layer. The internal stress of the membrane was 19 +/- 6 MPa (3σ) (tensile), and the membrane flatness was 0.8 μm. An ES chuck for an LSM-IPRO, which holds a mask in the method compatible with that in LEEPL exposure tools, has been installed. Chucking reduced the mask flatness from 22 μm to 10 μm while the membrane flatness was kept less than 1.0 µm. The dynamic repeatability of IP measurement was 7.6 nm (x) and 4.8 nm (y) in 3σ. The IP error of the monitor mask that had only IP marks was 17 nm (x) and 17 nm (y) in 3σ, satisfying the specification of 30 nm or less.

Citation Download Citation

Yuuki Aritsuka, Minoru Kitada, Masaru Kurosawa, Tadahiko Takikawa, Hiroshi Fujita, Hisatake Sano, Morihisa Hoga, and Naoya Hayashi "Development of a LEEPL mask: flatness and IP measurements", Proc. SPIE 5446, Photomask and Next-Generation Lithography Mask Technology XI, (20 August 2004); https://doi.org/10.1117/12.557777

ACCESS THE FULL ARTICLE

INSTITUTIONAL
Select your institution to access the SPIE Digital Library.

SELECT YOUR INSTITUTION

PERSONAL
Sign in with your SPIE account to access your personal subscriptions or to use specific features such as save to my library, sign up for alerts, save searches, etc.

PERSONAL SIGN IN

No SPIE Account? Create one

PURCHASE THIS CONTENT

SUBSCRIBE TO DIGITAL LIBRARY

50 downloads per 1-year subscription

Members: $195

Non-members: $335 ADD TO CART

25 downloads per 1 - year subscription

Members: $145

Non-members: $250 ADD TO CART

PURCHASE SINGLE ARTICLE

Includes PDF, HTML & Video, when available

Members: $17.00

Non-members: $21.00 ADD TO CART

PROCEEDINGS
9 PAGES

DOWNLOAD PAPER SAVE TO MY LIBRARY

GET CITATION

RIGHTS & PERMISSIONS

Get copyright permission Get copyright permission on Copyright Marketplace

KEYWORDS

Photomasks

Semiconducting wafers

Charged-particle lithography

Silicon

Electron beam lithography

Optical testing

Doping

Show All Keywords

Keywords/Phrases

Search In:

Publication Years