Influence of 2D electrostatic effects on the high-frequency noise behavior of sub-100-nm scaled MOSFETs

Raúl Rengel; Daniel Pardo; María Jesús Martín

doi:10.1117/12.546966

25 May 2004 Influence of 2D electrostatic effects on the high-frequency noise behavior of sub-100-nm scaled MOSFETs

Raúl Rengel, Daniel Pardo, María Jesús Martín

Proceedings Volume 5470, Noise in Devices and Circuits II; (2004) https://doi.org/10.1117/12.546966
Event: Second International Symposium on Fluctuations and Noise, 2004, Maspalomas, Gran Canaria Island, Spain

Abstract

In this work, we have performed an investigation of the consequences of dowscaling the bulk MOSFET beyond the 100 nm range by means of a particle-based Monte Carlo simulator. Taking a 250 nm gate-length ideal structure as the starting point, the constant field scaling rules (also known as “classical” scaling) are considered and the high-frequency dynamic and noise performance of transistors with 130 nm, 90 nm and 60 nm gate-lengths are studied in depth. The analysis of internal quantities such as electric fields, velocity and energy of carriers or conduction band profiles shows the increasing importance of electrostatic two-dimensional effects due to the proximity of source and drain regions even when the most ideal bias conditions are imposed. As a consequence, a loss of the transistor action for the smallest MOSFET and the degradation of the most important high-frequency figures of merit is observed. Whereas the comparative values of intrinsic noise sources (SID, SIG) are improved when reducing the dimensions and the bias voltages, the poor dynamic performance yields an overall worse noise behaviour than expected (especially for Rn and Gass), limiting at the same time the useful bias ranges and conditions for a proper low-noise configuration.

Citation Download Citation

Raúl Rengel, Daniel Pardo, and María Jesús Martín "Influence of 2D electrostatic effects on the high-frequency noise behavior of sub-100-nm scaled MOSFETs", Proc. SPIE 5470, Noise in Devices and Circuits II, (25 May 2004); https://doi.org/10.1117/12.546966

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