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29 September 2004 Determination of the optimal electrical bandwidth in CCD- and CMOS-based image detector applications
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Limiting the electrical frequency response of the output video prior to analog-to-digital conversion is a common technique used to maximize the signal to noise ratio in imaging systems employing CCD and CMOS based solid-state detectors. Bandwidth limiting effectively reduces the magnitude of the stochastic noise in the video signal prior to digitization; but this filtering action can also change the information content in the video stream if it is applied too liberally. Various "rules of thumb" exist in the detector community for setting the bandwidth in video processing electronics. However, it will be shown that significant signal errors can be induced in many applications if such general design practices are followed implicitly. This paper addresses the general question of how to optimize bandwidth limiting in systems employing either CCD or CMOS based detectors. Induced errors in pixel signal and spatial frequency response (MTF) are analyzed as a function of bandwidth limiting for both CCD and CMOS based detectors and recommended bandwidth values are presented for systems utilizing 8 through 18 bit analog-to-digital converters.
© (2004) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Robert H. Philbrick "Determination of the optimal electrical bandwidth in CCD- and CMOS-based image detector applications", Proc. SPIE 5499, Optical and Infrared Detectors for Astronomy, (29 September 2004);


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