Defect inspection and repair performance on CPL masks for 90- and 65-nm node line patterns

Yasutaka Morikawa; Kouichirou Kojima; Hiroyuki Hashimoto; Yuuichi Yoshida; Shiho Sasaki; Hiroshi Mohri; Naoya Hayashi

doi:10.1117/12.569186

6 December 2004 Defect inspection and repair performance on CPL masks for 90 and 65nm node line patterns

Yasutaka Morikawa, Kouichirou Kojima, Hiroyuki Hashimoto, Yuuichi Yoshida, Shiho Sasaki, Hiroshi Mohri, Naoya Hayashi

Proceedings Volume 5567, 24th Annual BACUS Symposium on Photomask Technology; (2004) https://doi.org/10.1117/12.569186
Event: Photomask Technology, 2004, Monterey, California, United States

Abstract

Chrome-less Phase Lithography (CPL) technology is introduced as one of the key Resolution Enhancement Technologies for the application of 90 and 65nm node logic gate layer. From the view point of mask manufacturing, one of the strong points is that it doesn’t require complicated data division process into two complementary patterns, such as for double exposure AAPSM technology, and is possible to prepare the data by extension of EAPSM design technology. Another is the point of having a good wafer printing performance which is not inferior to AAPSM by giving the optimum exposure condition for a pattern. Although the optimization of OPC tuning is required, if a perfect mask manufacturing process is developed, it will be considered very feasible RET technology. While a mask process is important, establishment of inspection and repair technology is also very important. We have designed and fabricated a CPL defect test mask which has 90nm and 65nm technology nodes Line patterns for ArF lithography. By using this defect test mask, we will report defect detectability which was evaluated by several inspection systems. And also we will show the defect printability results by Zeiss MSM193 simulation microscope to confirm how the defect will affect to printing results. We also show repair performance of RAVE Nano-machining technology with the confirmation of printability by AIMS tool. Finally, we will discuss about when and how many inspections will be required in the CPL mask process.

Citation Download Citation

Yasutaka Morikawa, Kouichirou Kojima, Hiroyuki Hashimoto, Yuuichi Yoshida, Shiho Sasaki, Hiroshi Mohri, and Naoya Hayashi "Defect inspection and repair performance on CPL masks for 90 and 65nm node line patterns", Proc. SPIE 5567, 24th Annual BACUS Symposium on Photomask Technology, (6 December 2004); https://doi.org/10.1117/12.569186

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