Translator Disclaimer
Paper
30 June 2005 ACE16k based stand-alone system for real-time pre-processing tasks
Author Affiliations +
Proceedings Volume 5837, VLSI Circuits and Systems II; (2005) https://doi.org/10.1117/12.608220
Event: Microtechnologies for the New Millennium 2005, 2005, Sevilla, Spain
Abstract
This paper describes the design of a programmable stand-alone system for real time vision pre-processing tasks. The system's architecture has been implemented and tested using an ACE16k chip and a Xilinx xc4028xl FPGA. The ACE16k chip consists basically of an array of 128x128 identical mixed-signal processing units, locally interacting, which operate in accordance with single instruction multiple data (SIMD) computing architectures and has been designed for high speed image pre-processing tasks requiring moderate accuracy levels (7 bits). The input images are acquired using the optical input capabilities of the ACE16k chip, and after being processed according to a programmed algorithm, the images are represented at real time on a TFT screen. The system is designed to store and run different algorithms and to allow changes and improvements. Its main board includes a digital core, implemented on a Xilinx 4028 Series FPGA, which comprises a custom programmable Control Unit, a digital monochrome PAL video generator and an image memory selector. Video SRAM chips are included to store and access images processed by the ACE16k. Two daughter boards hold the program SRAM and a video DAC-mixer card is used to generate composite analog video signal.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Luis Carranza, Francisco Jimenez-Garrido, Gustavo Linan-Cembrano, Elisenda Roca, Servando Espejo Meana, and Angel Rodriguez-Vazquez "ACE16k based stand-alone system for real-time pre-processing tasks", Proc. SPIE 5837, VLSI Circuits and Systems II, (30 June 2005); https://doi.org/10.1117/12.608220
PROCEEDINGS
8 PAGES


SHARE
Advertisement
Advertisement
RELATED CONTENT

FPGA implementation of real-time digital image stabilization
Proceedings of SPIE (February 21 2014)
Real time image processing system
Proceedings of SPIE (February 19 2008)
Versatile LLRF platform for FLASH laser
Proceedings of SPIE (December 28 2007)

Back to Top