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7 September 2005 CCD/CMOS hybrid FPA for low light level imaging
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We present a CCD / CMOS hybrid focal plane array (FPA) for low light level imaging applications. The hybrid approach combines the best of CCD imaging characteristics (e.g. high quantum efficiency, low dark current, excellent uniformity, and low pixel cross talk) with the high speed, low power and ultra-low read noise of CMOS readout technology. The FPA is comprised of two CMOS readout integrated circuits (ROIC) that are bump bonded to a CCD imaging substrate. Each ROIC is an array of Capacitive Transimpedence Amplifiers (CTIA) that connect to the CCD columns via indium bumps. The proposed column parallel readout architecture eliminates the slow speed, high noise, and high power limitations of a conventional CCD. This results in a compact, low power, ultra-sensitive solid-state FPA that can be used in low light level applications such as live-cell microscopy and security cameras at room temperature operation. The prototype FPA has a 1280×1024 format with 12-um square pixels. Measured dark current is less than 5.8 pA/cm2 at room temperature and the overall read noise is as low as 2.9e at 30 frames/sec.
© (2005) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Xinqiao Liu, Boyd A. Fowler, Steve K. Onishi, Paul Vu, David D. Wen, Hung Do, and Stuart Horn "CCD/CMOS hybrid FPA for low light level imaging", Proc. SPIE 5881, Infrared and Photoelectronic Imagers and Detector Devices, 58810C (7 September 2005);


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