Recent progress of hybrid CMOS visible focal plane array technology

Y. Bai; M. C. Farris; A. Joshi; J. R. Hosack; J. Bajaj; J. T. Montroy

doi:10.1117/12.637399

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25 August 2005 Recent progress of hybrid CMOS visible focal plane array technology

Y. Bai, M. C. Farris, A. Joshi, J. R. Hosack, J. Bajaj, J. T. Montroy

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Proceedings Volume 5902, Focal Plane Arrays for Space Telescopes II; 59020G (2005) https://doi.org/10.1117/12.637399
Event: Optics and Photonics 2005, 2005, San Diego, California, United States

Abstract

Silicon-based hybrid CMOS visible focal plane array technology is emerging as a viable high performance alternative to scientific CCDs. The progress is attributed to the rapid advances in CMOS technology, mature precision flip-chip hybridization of large size and fine pixel arrays, and detector array performance improvements. Its technology readiness level (TRL) for space applications is being enhanced by relevant environmental tests and in-depth characterization of sensor performance. In this paper, we present recent results of Rockwell Scientific's hybrid CMOS silicon focal plane array technology, including large format arrays up to 2048x2048, broadband QE, sensor noise improvement, high radiation hardness, and the higher degree of system integration through on-chip ADCs and companion ASICs.

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Y. Bai, M. C. Farris, A. Joshi, J. R. Hosack, J. Bajaj, and J. T. Montroy "Recent progress of hybrid CMOS visible focal plane array technology", Proc. SPIE 5902, Focal Plane Arrays for Space Telescopes II, 59020G (25 August 2005); https://doi.org/10.1117/12.637399

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