High-performance VLSI architecture for adaptive scaling

Philip P. Dang

doi:10.1117/12.651456

15 February 2006 High-performance VLSI architecture for adaptive scaling

Philip P. Dang

Proceedings Volume 6063, Real-Time Image Processing 2006; 60630C (2006) https://doi.org/10.1117/12.651456
Event: Electronic Imaging 2006, 2006, San Jose, California, United States

Abstract

This paper introduces an adaptive approach for image scaling. In addition, we present an efficient VLSI architecture to implement the proposed algorithm in hardware. The proposed architecture is designed to address the real-time constrain for high performance consumer products. A case study for printer application is presented.

Citation Download Citation

Philip P. Dang "High-performance VLSI architecture for adaptive scaling", Proc. SPIE 6063, Real-Time Image Processing 2006, 60630C (15 February 2006); https://doi.org/10.1117/12.651456

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