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21 February 2006 Improving low-light CMOS performance with four-transistor four-shared pixel architecture and charge-domain binning
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Proceedings Volume 6069, Digital Photography II; 606903 (2006) https://doi.org/10.1117/12.641773
Event: Electronic Imaging 2006, 2006, San Jose, California, United States
Abstract
A new architecture found in the KODAK KAC-3100 CMOS Image Sensor has been created to dramatically improve CMOS image performance in mobile applications. The method of operation and implementation is explained and the improvement of performance parameters on image quality is discussed. The benefits of the new architecture are discussed in relation to competitive CMOS technologies used in high-demanding mobile imaging applications today.
© (2006) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Failop Chu, R. M. Guidash, J. Compton, S. Coppola, and W. Hintz "Improving low-light CMOS performance with four-transistor four-shared pixel architecture and charge-domain binning", Proc. SPIE 6069, Digital Photography II, 606903 (21 February 2006); https://doi.org/10.1117/12.641773
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