Paper
29 March 2006 Defectivity reduction by optimization of 193-nm immersion lithography using an interfaced exposure-track system
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Abstract
As the integration of semiconductor devices continues, pattern sizes required in lithography get smaller and smaller. To achieve even more scaling down of these patterns without changing the basic infrastructure technology of current cutting-edge 193-nm lithography, 193-nm immersion lithography is being viewed as a powerful technique that can accommodate next-generation mass productions needs. Therefore this technology has been seriously considered and after proof of concept it is currently entering the stage of practical application. In the case of 193-nm immersion lithography, however, because liquid fills the area between the projection optics and the silicon wafer, several causes of concern have been raised - namely, diffusion of moisture into the resist film due to direct resist-water interaction during exposure, dissolution of internal components of the resist into the de-ionized water, and the influence of residual moisture generated during exposure on post-exposure processing. To prevent these unwanted effects, optimization of the three main components of the lithography system: materials, track and scanner, is required. For the materials, 193nm resist formulation improvements specifically for immersion processing have reduced the leaching and the sensitivity to water related defects, further benefits can be seen by the application of protective top coat materials. For the track component, optimization of the processing conditions and immersion specific modules are proven to advance the progress made by the material suppliers. Finally, by optimizing conditions on the 3rd generation immersion scanner with the latest hardware configuration, defectivity levels comparable to dry processing can be achieved. In this evaluation, we detail the improvements that can be realized with new immersion specific track rinse modules and formulate a hypothesis for the improvements seen with the rinsing process. Additionally, we show the current status of water induced immersion specific defect reduction using the latest advances in technology.
© (2006) COPYRIGHT Society of Photo-Optical Instrumentation Engineers (SPIE). Downloading of the abstract is permitted for personal use only.
Michael Carcasi, Shinichi Hatakeyama, Kathleen Nafus, Richard Moerman, Youri van Dommelen, Peter Huisman, Joshua Hooge, Steven Scheer, and Philippe Foubert "Defectivity reduction by optimization of 193-nm immersion lithography using an interfaced exposure-track system", Proc. SPIE 6153, Advances in Resist Technology and Processing XXIII, 61533J (29 March 2006); https://doi.org/10.1117/12.656444
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Cited by 3 scholarly publications.
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KEYWORDS
Photoresist processing

Thin film coatings

Immersion lithography

Scanners

Binary data

Lithography

Standards development

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