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25 April 2006 Capabilities of a new spatiotemporal CMOS imager for nanosecond low power pulse detection
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High speed cameras use the interesting performances of CMOS imagers which offer advantages in on-chip functionalities, system power reduction, cost and miniaturization. The FAst MOS Imager (FAMOSI) project consists in reproducing the streak camera functionality with a CMOS imager. In this paper, we present a new imager called FAMOSI 2 which implements an electronic shutter and analog accumulation capabilities inside the pixel. With this kind of pixel and the new architecture for controlling the integration, FAMOSI 2 can work in repetitive mode for low light power and in single shot mode for higher light power. This repetitive mode utilizes an analog accumulation to improve the sensitivity of the system with a standard Nwell/Psub photodiode. The prototype has been fabricated in the AMS 0.35 μm CMOS process. The chip is composed of 64 columns per 64 rows of pixels. The pixels have a size of 20 μm per 20 μm and a fill factor of 47 %. Characterizations under static and uniform illumination in single shot mode have been done in order to evaluate the performances of the detector. The main noises levels have been evaluated and the experiments show that a conversion gain of 4.8 μV/e- is obtained with a dynamic range of 1.2 V. Moreover, the charge transfer characterization in single shot mode has been realized. It permits to know which potential must be apply to the charge spill transistor to obtain the whole dynamic of the output with a maximal transfer gain, what is primordial to optimize the analog accumulation.
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Frédéric Morel, Chantal-Virginie Zint, Wilfried Uhring, and Jean-Pierre Le Normand "Capabilities of a new spatiotemporal CMOS imager for nanosecond low power pulse detection", Proc. SPIE 6187, Photon Management II, 61871N (25 April 2006);

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